Verification Lead (Lead DV)
Lumilens· Engineering
San JoseFull-timePosted 2mo ago
About the role
Verification Lead responsible for end-to-end DV strategy and leadership of a DV team for a first-of-its-kind chiplet, encompassing methodology definition before RTL, regression infrastructure, mixed-signal verification, and full-chip signoff.
Responsibilities
- The full DV strategy: verification plan, coverage model (functional + code), UVM architecture, and signoff criteria from block to full-chip.
- Stand up regression/CI infrastructure and nightly runs before design hands over first RTL.
- Verification of the in-house engines against an algorithmic golden model, with programmable error injection and error-pattern coverage.
- Hardware-assisted verification: bring up and own the emulation / FPGA-prototyping methodology.
- UCIe VIP and compliance, link-training, loopback, lane-repair scenarios, bit-exact transparency and more.
- Performance and throughput verification.
- UVM register verification, firmware co-simulation, and boot flows on the MCU subsystem.
- Mixed-signal co-simulation — verifying the digital front end against behavioral models of analog/mixed-signal blocks.
- Gate-level and low-power (UPF) verification as part of signoff.
- Lead and grow the DV team (across FEC, UCIe, MCU, datapath, and full-chip).
Qualifications
- 10+ years ASIC/SoC verification, with team leadership on at least one complex SoC from plan to tapeout.
- Proven leadership verifying large, complex digital SoCs / subsystems, including interconnect fabric and full-chip closure.
- Deep UVM/SystemVerilog; coverage-driven verification; constrained-random methodology.
- Hands-on with hardware-assisted verification — emulation (e.g., Palladium/Veloce) and/or FPGA prototyping (e.g., HAPS/Protium).
- Comfortable with mixed-signal verification (Verilog-AMS or SV real models).
- Regression/CI at scale (grid, triage automation), and rigorous coverage closure.
Skills
Required:ASIC/SoC verification leadershipUVM/SystemVerilogHardware-assisted verificationMixed-signal verificationRegression/CI at scale
Benefits
- Competitive salary commensurate with experience
- Comprehensive benefits package including health, dental, and vision
- Professional development opportunities and certification support
- Access to cutting-edge technology and cloud platforms
- Collaborative work environment with cross-functional teams
Last updated Sep 5, 2026. Interested? Apply on the company site.
About Lumilens
Connectivity Platform for AI
Lumilens provides next-gen photonic interconnects for massively scaling out – and scaling up – AI compute infrastructure.
Photonic InterconnectsNext-Gen ManufacturingSystem-level knowledgeLumicore platformCPO/SiPh manufacturing
More open roles at Lumilens
- Assistant Office ManageryesterdaySingapore · Operations
- Office Manager & Receptionist, Bulim Square1w agoBulim Square · Operations
- Analog and Mixed Signal Layout Engineer2w agoBengaluru, India · Engineering
- EDA & CAD Manager3w agoSan Jose · Engineering
- Network Engineer3w agoSingapore · IT