Power Integrity Engineer
Lumilens· Engineering
Bengaluru, IndiaFull-timePosted 2mo ago
About the role
Role to optimize power distribution networks for OSFP transceiver designs, ensuring robust, low-noise PDN for high-speed silicon photonics, DSPs, and retimers in dense 800G+ modules; collaborate across teams to minimize PDN impedance and EMI.
Responsibilities
- Perform PI simulations using tools like Ansys SIwave, Keysight ADS, or Cadence Sigrity to model and optimize PDN for OSFP modules, targeting <1mΩ target impedance across 10kHz-100MHz bandwidth.
- Analyze and mitigate power rail decoupling, VRMs, and bypass capacitor placement for multi-rail supplies (0.8V core, 1.8V I/O, 3.3V aux) in high-current OSFP designs up to 100W+.
- Collaborate on PCB stackups, via optimization, and plane splitting to reduce simultaneous switching noise (SSN) and ground bounce in 112G PAM4 SerDes environments.
- Validate designs through lab measurements using VNA, oscilloscopes, and power analyzers; correlate simulations with hardware prototypes.
- Support signal integrity co-optimization, thermal-PD synergy (e.g., integrating TIMs with PDN), and compliance to IEEE 802.3ck/802.3df standards.
- Document PI reports, contribute to design reviews, and mentor junior engineers on best practices for hyperscale OSFP deployments.
Qualifications
- Bachelor’s or Master’s in Electrical/Electronics Engineering, with focus on RF/mixed-signal design.
- 5+ years in PI for high-speed transceivers (OSFP, QSFP-DD, or CDFP preferred); hands-on with 50G+ SerDes.
- Proficiency in PI tools (Ansys, HyperLynx, Sigrity) and scripting (Python/MATLAB) for automation.
- Strong understanding of power converter topologies (Buck/Buck-Boost), ESL modeling, and EMI/EMC mitigation.
- Experience with OSFP mechanical constraints, flex-rigid PCBs, and multi-die integration (e.g., co-packaged optics).
- Preferred Skills
- Familiarity with thermal co-simulation (e.g., Ansys Icepak integration) for heat-affected PDN performance.
- Knowledge of advanced materials like low-Dk dielectrics or embedded passives for PDN miniaturization.
- Prior work on 1.6T OSFP or CPO (Co-Packaged Optics) prototypes.
Skills
Required:PI tool proficiencyScripting for automationRF/mixed-signal designPower electronics knowledge
Nice to have:OSFP/Co-packaged optics exposure
Benefits
- Competitive salary commensurate with experience
- Comprehensive benefits package including health insurance
- Professional development opportunities and certification support
- Access to cutting-edge technology and cloud platforms
- Collaborative work environment with cross-functional teams
Last updated Aug 8, 2026. Interested? Apply on the company site.
About Lumilens
Connectivity Platform for AI
Lumilens provides next-gen photonic interconnects for massively scaling out – and scaling up – AI compute infrastructure.
Photonic InterconnectsNext-Gen ManufacturingSystem-level knowledgeLumicore platformCPO/SiPh manufacturing
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