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Senior Signal Integrity Engineer

Lumilens· Engineering
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Bengaluru, IndiaFull-timePosted 2mo ago

About the role

Senior SI Engineer lead for high‑speed board‑level design and validation for 1.6T DR8 OSFP modules, including technical leadership, mentoring, and cross‑functional collaboration.

Responsibilities

  • Own SI/PI architecture and strategy for 1.6T DR8 OSFP modules: define channel budgets, interface architectures, and design rules for 200G PAM4 lanes from ASIC/DSP to front‑panel.
  • Lead pre‑ and post‑layout SI/PI simulations and reviews (S‑parameters, eye/PAM4 analysis, COM, crosstalk, jitter, PDN impedance) and sign‑off multi‑lane channels on dense module PCBs.
  • Define PCB stack‑ups, materials (e.g., ultra‑low‑loss laminates), via and breakout strategies, connector selections, and routing guidelines to meet performance, cost, and manufacturability targets.
  • Drive cross‑functional technical decisions with hardware, optics, mechanical, FW, and test teams, balancing SI/PI requirements against thermal, mechanical, and system constraints.
  • Lead lab correlation and validation plans: fixture/board design, TDR/VNA/BERT/oscilloscope measurements, de‑embedding strategies, and sign‑off criteria for engineering builds and production.
  • Provide technical leadership for SI‑related debug on proto and field issues, driving structured root‑cause analysis and design/process improvements across products.
  • Establish and maintain company‑wide SI/PI design methodologies, checklists, and documentation for current and future OSFP/QSFP‑class platforms.
  • Mentor and coach junior and mid‑level SI/hardware engineers; review and approve their simulations, reports, and design decisions.

Qualifications

  • B.E./B.Tech or M.E./M.Tech (or equivalent) in Electrical/Electronics Engineering with 15–20 years of relevant high‑speed SI/PI and board‑level design experience.
  • Deep expertise in very high‑speed SerDes (≥56G, strongly preferred 100G/200G PAM4) including channel modeling, equalization strategies, jitter/crosstalk analysis, and margining.
  • Extensive hands‑on experience with leading SI/PI tools (e.g., Sigrity, ADS, HFSS, SIwave, HSPICE or equivalents) and scripting/automation for simulation and report generation.
  • Proven track record bringing complex high‑speed hardware or optical modules from concept through production, including multiple design spins and volume manufacturing support.
  • Strong lab expertise with high‑bandwidth scopes, VNAs, BERTs, and TDRs, including correlation of measurements to simulations and management of external labs/vendors when needed.
  • Demonstrated ability to lead cross‑functional design reviews, influence architecture, and communicate complex SI/PI concepts clearly to both technical and non‑technical stakeholders.

Skills

Required:SI/PI engineeringSerDes (≥56G, 100G/200G PAM4)SI/PI tools

Benefits

  • Competitive salary commensurate with experience
  • Comprehensive benefits package including health insurance
  • Professional development opportunities and certification support
  • Access to cutting‑edge technology and cloud platforms
  • Collaborative work environment with cross‑functional teams
Last updated Aug 8, 2026. Interested? Apply on the company site.

About Lumilens

Connectivity Platform for AI

Lumilens provides next-gen photonic interconnects for massively scaling out – and scaling up – AI compute infrastructure.

Photonic InterconnectsNext-Gen ManufacturingSystem-level knowledgeLumicore platformCPO/SiPh manufacturing

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