Kernel Engineer (Custom Silicon), Hardware
Hybrid (Austin, TX / Palo Alto, CA)$200k - $420kfull-timePosted 2mo ago
About the role
Kernel Engineer role focused on building the foundational compute engine for River's high-performance custom silicon, including design and implementation of kernel generators, low-level compute primitives, and microarchitectural/tuning work across HW/SW teams.
Responsibilities
- Kernel Generator Development: Design and build C++ code-generation frameworks and meta-programming toolchains that automatically emit optimized custom ISA assembly code.
- Low-Level Compute Optimization: Author and optimize core deep learning primitives (GEMM/MatMul, Attention mechanisms, Convolutions, and element-wise layers) directly targeted at our custom hardware.
- Microarchitectural Tuning: Hand-craft and automate instruction scheduling, register allocation, and software pipelining to maximize ALU utilization and hide execution latency on our silicon.
- Memory Hierarchy Management: Design sophisticated tiling, double-buffering, and data-movement strategies to optimize on-chip SRAM utilization and minimize memory bandwidth bottlenecks.
- HW/SW Co-Design: Partner with the RTL and architecture teams to evaluate hardware simulations, provide feedback on the ISA, and influence the design of future compute units based on kernel execution profiles.
- Performance Profiling & Validation: Benchmark generated assembly against hardware simulators and silicon, utilizing hardware performance counters to eliminate performance gaps and ensure mathematical correctness.
Qualifications
- Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field, and 5+ years of practical industry experience in low-level performance programming.
- Deep understanding of hardware programming models (e.g., CUDA, Triton, CUTLASS, or custom accelerator assembly) and a proven track record of shipping highly optimized kernels.
- Advanced knowledge of Computer Architecture, including vector units, execution pipelines, register files, and complex memory hierarchies (caches, SRAM, HBM/DRAM).
- Proficiency in modern C++ for building robust, scalable meta-programming and code-generation frameworks.
- Strong mathematical foundation in linear algebra operations and deep learning primitives.
- A highly collaborative mindset to push boundaries and co-design effectively with hardware and compiler teams.
Skills
Required:Kernel generation / code-generation frameworksLow-level compute primitives optimizationMicroarchitectural optimizationMemory hierarchy designHW/SW co-design collaborationPerformance profiling & validation
Benefits
- generous health, dental, and vision benefits
- unlimited PTO
- relocation support as needed
Last updated Sep 23, 2026. Interested? Apply on the company site.
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