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Compiler Engineer, Hardware

River AI· Personal AI Hardware
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Hybrid (Palo Alto, California), Hybrid (Austin, Texas)$200k - $420kfull-timePosted 2mo ago

About the role

AI compiler engineer role focused on building a compiler stack from PyTorch graphs to optimized custom ISA code for River AI’s high-performance silicon, collaborating with researchers, performance, and silicon teams.

Responsibilities

  • Graph Lowering & Optimization: Design and implement compiler passes to lower PyTorch models into custom hardware, leveraging MLIR dialects and LLVM frameworks.
  • Custom Backend Development: Develop and maintain the backend toolchain for our custom silicon, including instruction scheduling, register allocation, and hardware-specific code generation.
  • Memory & Loop Transformations: Design sophisticated tiling and fusion strategies to maximize bandwidth utilization and minimize on-chip memory movement.
  • Kernel Integration: Collaborate with software and hardware teams to integrate high-performance kernels (Triton/CUDA-like) into the automated compiler flow.
  • Performance Profiling: Identify "compilation gaps" where the compiler fails to achieve peak hardware performance, and collaborate with the performance team for targeted optimizations to close those gaps.
  • HW/SW Co-Design: Partner with the RTL and Architecture teams to change the custom ISA definitions.

Qualifications

  • Bachelor’s degree in Electrical Engineering or Computer Engineering, and 5+ years practical industry experience working with advanced process nodes (7nm or below).
  • Deep hands-on experience with MLIR or XLA for deep learning workloads.
  • Expert-level understanding of PyTorch internals and how they interface with external backends.
  • Proficiency in modern C/C++ for building robust, scalable, and high-performance compiler infrastructure.
  • Advanced knowledge in Computer Architecture, especially the Programming Model, of at least one style of chip, including SoCs, CPUs, GPUs, or AI accelerators
  • A highly collaborative mindset to push boundaries and co-design effectively with other engineers.

Skills

Required:MLIR or XLA experiencePyTorch internalsC/C++Computer ArchitectureCollaborative/Co-design skills

Benefits

  • River AI offers generous health, dental, and vision benefits, unlimited PTO, and relocation support as needed.
Last updated Sep 23, 2026. Interested? Apply on the company site.
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