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Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)

SpaceX· Starlink Process Engineering
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Bastrop, TXfull-timePosted 2mo ago

About the role

Senior IC packaging test engineer responsible for defining and bringing up electrical test equipment and automated test programs for packaging and wafer-level production testing in Starlink's in-house IC packaging and assembly environment.

Responsibilities

  • Own electrical test equipment definition for packaging and wafer level production testing
  • Bring-up of test equipment and test programs for mass manufacturing
  • Create automated test equipment (ATE) test programs and test plans
  • Define full and comprehensive testing requirements to ensure product conformance
  • Schematic and electrical review for all test equipment
  • Supplier test interface for implementing new features, cost, and productivity improvements
  • Implement advanced testing solutions for SpaceX next generation products

Qualifications

  • Bachelor’s degree in electrical engineering, computer engineering, computer science, physics, or other applied engineering discipline
  • 5+ years of programming experience in C/C++/Visual/Python

Skills

Required:Programming in C/C++/Visual/PythonElectrical test equipment definitionAutomated test equipment (ATE) test programs
Nice to have:RF and high-speed semiconductor testWafer sort / wafer probe / probe card designDigital waveform and test plan programming
Last updated Oct 7, 2026. Interested? Apply on the company site.

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