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Staff PCB Designer/Layout Engineer, Air Dominance and Strike

Anduril· Air Dominance & Strike : Air Dominance & Strike Hardware : Electrical Engineering
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Costa Mesa, CA$168k - $272kPosted 3w ago

About the role

Staff level PCB designer/layout engineer to join Anduril's Costa Mesa team, collaborating with avionics, system, and software engineers to create test systems for development, qualification, verification, and validation in a fast-paced defense technology environment.

Responsibilities

  • Lead designer on complex or multi-board programs, setting and documenting layout constraints, conducting design reviews, and mentoring less experienced designers
  • Collaborate with electrical, mechanical, and program teams to manage layout scope, schedule, and risk across concurrent programs
  • Read and interpret schematics, apply best practices for each design, and push back on decisions that introduce layout, manufacturability, or integrity risk
  • Define and validate PCB stackups with fabricators, ensuring manufacturability and reliability
  • Own ECAD libraries and library standards — footprint creation and verification, IPC compliance, governance across multiple designers
  • Interpret SI/PI simulation results and translate them into layout constraints
  • Execute expert-level high speed digital layout and controlled impedance routing (DDR, PCIe, SerDes, Ethernet, USB) including length/skew matching, differential pairs, and return path management
  • Work with high density designs (fine-pitch BGA, HDI/microvia, >12 layer stacks)
  • Lead development across programs while coordinating with avionic, mechanical, and software engineering teams
  • Eligible for security clearance

Qualifications

  • 10+ years of experience with PCB layout
  • 5+ years of experience with Altium
  • Ability to read and interpret schematics and apply design best practices
  • Deep understanding of PCB fabrication/assembly processes, design rules, stackup definition with fabricators
  • Experience owning ECAD libraries, footprint creation and verification, IPC compliance
  • Working knowledge of signal and power integrity principles and SI/PI interpretation for layout constraints
  • Expert-level high speed digital layout and controlled impedance routing (DDR, PCIe, SerDes, Ethernet, USB)
  • Experience with high density designs: fine-pitch BGA fanout, HDI/microvia, >12-layer stacks
  • Demonstrated technical leadership in complex programs, design reviews, mentoring
  • Ability to manage layout scope, schedule, and risk across concurrent programs
  • Bachelor’s degree in electrical engineering or similar
  • Eligible for security clearance

Skills

Required:PCB layoutAltiumSchematic interpretationStackup definitionECAD library ownershipSI/PI principlesHigh speed digital routingHDI/microvia designsLeadership

Benefits

  • Benefits package including health, recovery, and related coverage; detailed information available via Explore Our Benefits
Last updated Oct 7, 2026. Interested? Apply on the company site.

About Anduril

defense-aero-and-safetyliquid-ai-recruiting-targetsetter-30setter-30-2026-q1wing-list-2026wing-list-2026-giga-stage
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