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DPU Performance Architect, Infrastructure Silicon

Meta· Hardware
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Sunnyvale, CA$178k - $250kFull-timePosted 2w ago

About the role

Meta seeks an experienced Performance Architect to drive performance modeling, analysis, and validation of Data Processing Unit (DPU) architectures within Infrastructure Silicon, influencing architecture and microarchitecture decisions from early path-finding through RTL validation and silicon correlation.

Responsibilities

  • Analyze performance of current and future SmartNIC/IPU/DPU architectures with focus on end-to-end transaction flows, host-to-DPU offloading options, evaluation of SoC architectural options
  • Quantify architectural/micro-architectural trade-offs wrt PPA to inform and guide design decisions
  • Analyze and characterize DPU workloads to abstract key performance-relevant behaviors and incorporate into representative models and synthetic benchmarks
  • Develop and enhance performance models, simulation tools, and methodologies to evaluate future DPU architectures
  • Drive RTL performance validation, including development of comprehensive performance test plans, coverage criteria, and correlation of RTL results against architectural models
  • Correlate pre-silicon performance projections with post-silicon measurements and drive methodology improvements based on findings

Qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 8+ years of relevant industry experience in developing analytical/tool based models and performance analysis with focus on networking and storage architectures
  • Detailed understanding of DPU architectures: network virtualization, storage disaggregation, networking and storage protocols such as RoCE, NVMe, fabric architectures
  • Experience in workload analysis and characterization, and abstracting key performance features into models for analysis
  • Proficiency in languages for model development (e.g. Python, C/C++, SystemC)
  • Experience with data center workloads and benchmarking methodologies
  • Experience with RTL performance validation, including authoring and executing performance test plans and correlating pre-silicon performance models with post-silicon measurements
  • Experience driving analysis independently and influencing architectural direction through data

Skills

Required:Analytical/modelingWorkload analysis and characterizationRTL performance validation

Benefits

  • Benefits information referenced in posting
Last updated Oct 23, 2026. Interested? Apply on the company site.

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