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ASIC Engineer Intern, Design Verification

Meta· Hardware
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BangaloreInternPosted 1w ago

About the role

Meta is seeking an ASIC Engineer Intern to join the Infrastructure organization to help build accelerators for data center workloads, participate in design and verification of advanced IPs, and contribute to verification methodologies. Internship duration is 12 to 16 weeks.

Responsibilities

  • Develop tests, checkers and coverage to help verify designs.
  • Develop understanding of the architecture and microarchitecture of designs.
  • SystemVerilog/UVM/C code to generate test content.
  • Develop scripts to automate various processes.
  • Debug test failures, work with design, verification and modeling teams to fix and verify the fixes.
  • Help improve verification processes and contribute to methodology.

Qualifications

  • Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
  • Knowledge of Computer Architecture and Logic Design fundamentals
  • Experience thinking critically and creatively on how to verify designs, solve problems
  • Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
  • Intent to return to degree-program after the completion of the internship

Skills

Required:SystemVerilog/UVMCKnowledge of Computer Architecture and Logic Design
Nice to have:Python or Perl scripting
Last updated Oct 23, 2026. Interested? Apply on the company site.

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