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FPGA Digital Design Engineer

Kepler· Engineering
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Hybrid (Remote)CA$131k - CA$181kFull-time RegularPosted 4d ago

About the role

FPGA Digital Design Engineer responsible for design and implementation of FPGA code for Kepler's satellite digital payloads, including DSP algorithms for SDR and embedded interfaces, across full FPGA design flow.

Responsibilities

  • Develop custom IP for new features of the Kepler satellite digital payloads
  • Iterate on current DSP and interface designs to improve reliability
  • Work with IP core vendors to integrate new functionality into the Kepler designs
  • Work with lead engineers in developing the communications and network architecture of our future satellite constellation
  • Participate in conceptual design studies of new spacecraft

Qualifications

  • Bachelor’s Degree in Computer Engineering, Electrical Engineering or equivalent
  • 5+ yr. working experience with FPGA/RTL design
  • Verilog, SystemVerilog, or VHDL with the willingness to learn or pivot to SystemVerilog
  • Xilinx FPGA(s). Specifically, Zynq and UltraScale
  • Solid understanding of timing principles, including clock domain crossing and timing closure
  • Strong scripting skills (e.g Python, Tcl, csh/bash, etc.)
  • Experience with FPGA tools (e.g Vivado, Quartus), HDL Simulation Tools (ModelSim)

Skills

Required:FPGA/RTL designVerilog/SystemVerilog/VHDLXilinx FPGA (Zynq, UltraScale)Timing closure / clock domain crossingScriptingFPGA tools (Vivado, Quartus)HDL Simulation Tools (ModelSim)
Last updated Oct 22, 2026. Interested? Apply on the company site.

About Kepler

Connecting Space. Empowering Earth.

Powered by advanced optical technology, the Kepler Network provides real-time data relay, on-orbit compute, and hosted payload services to form the modern backbone of a connected space ecosystem. These capabilities support defense and intelligence missions, accelerate earth observation insights, and enable scientific, commercial, and humanitarian applications that benefit people and the planet.

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