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ASIC Package Engineer

Meta· Engineering
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Sunnyvale, CA$178k - $250kFull-timePosted 4d ago

About the role

Meta is seeking an experienced ASIC Package Engineer to own technology development and qualification readiness of the package-to-board attach process for large-body advanced ASIC packages, collaborating with PQE/SQE and module design teams to deliver high-yield manufacturing processes.

Responsibilities

  • Own package-to-board interaction technology development for Meta's large-body advanced packages — how the package, substrate, and PCB behave together through assembly and in the field
  • Characterize and mitigate package warpage and coplanarity across the reflow window for large-body and lidless packages
  • Drive board-level reliability (BLR) strategy for ASIC packages in partnership with quality teams — thermal cycling, drop/shock, bend, and vibration
  • Define and execute mechanical and electrical test vehicle (MTV/ETV) strategies to de-risk package-board interaction ahead of A0 silicon availability, including solder-joint evaluation by X-ray, cross-section, and dye-and-pry at the ODM
  • Represent package-board interaction and board-assembly constraints in silicon/package/PCB/system co-design and product design reviews
  • Collaborate with package design and module design teams to ensure design for manufacturability (DFM) considerations are incorporated into package and board development
  • Develop and implement package-board interaction process specifications, design rules, and manufacturing guidelines for new package technologies
  • Evaluate and qualify new package-board interaction equipment, materials, and processes to support technology roadmap requirements
  • Partner with PQE, SQE, and ARD teams to establish quality standards, qualification criteria, and reliability requirements for package-board interaction processes
  • Establish statistical process control (SPC) methodologies and yield improvement initiatives for package-board interaction assembly operations
  • Own package-board interaction content in FMEAs, control plans, and key-characteristic definitions; support ODM line qualification and control-run gates with PQE
  • Create, conduct, and analyze Designs of Experiments (DOE) for package-board interaction development and sustaining activities
  • Drive supplier engagement and qualification for package-board interaction-related materials and equipment

Qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, or a related field, or equivalent practical experience
  • 8+ years of experience in semiconductor packaging with direct ownership of package-to-board assembly and reliability; package-board interaction process engineering or electronics manufacturing background
  • Experience with package board technology processes including solder paste printing, pick-and-place, reflow soldering, and inspection methods
  • Experience working with package assembly and ODM suppliers and driving process qualification and yield improvement programs
  • Experience with failure analysis techniques for solder joint reliability and package-board interaction-related defects
  • Experience collaborating with quality engineering teams (PQE/SQE) to establish process controls and qualification requirements
  • Experience with statistical process control, process capability analysis, and Design of Experiments
  • Willingness to travel internationally, typically once per quarter

Skills

Required:package-to-board interaction technologyDFM (design for manufacturability)statistical process control (SPC)DOE (Design of Experiments)

Benefits

  • Benefits information available at Meta's careers site
Last updated Oct 23, 2026. Interested? Apply on the company site.

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