Senior ASIC Verification Engineer
NVIDIA· Engineer, Verification
Hybrid (Santa Clara, CA), Hybrid (Austin, TX), Remote$136k - $218.5k + equityfull-timePosted 7mo ago
About the role
Senior ASIC Verification engineer focusing on clocking and reset verification for NVIDIA Clocks Team, delivering high-quality verification across Tegra, GPU, and SOC/AI products with scalable, multi-platform testing.
Responsibilities
- Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
- Tackle sophisticated problems and develop scalable solutions that work across platforms.
- Hands-on use of industry-standard verification tools and methodologies, including SystemVerilog, UVM, C++, Perl, Python, and NVIDIA custom compilers/tools.
- Partner with clocks architecture and design teams to validate clocks design.
- Coordinate with internal and external teams across time zones.
Qualifications
- BS or MS in EE/ECE or equivalent experience.
- 5+ years of relevant industry work experience.
- Good understanding of Logic Design and Architecture.
- Expertise in verification flows (SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc.).
- Exposure to block-level and system-level verification.
- Strong coding skills in SystemVerilog, scripting languages (Perl/Python), and C++.
- Ability to collaborate with multiple groups.
- Prior experience in implementing Test plans for pre-silicon platforms.
- Understanding of DFT/IST is optional.
Skills
Required:SystemVerilogUVMC++Python
Nice to have:Perl
Benefits
- equity
- benefits (see company benefits)
Last updated Oct 9, 2026. Interested? Apply on the company site.
About NVIDIA
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