Senior Machine Learning Applications and Compiler Engineer, LPX
NVIDIA· Engineer, Sys SW
Hybrid (Santa Clara, CA), Hybrid (Remote, CA)$152k - $241.5k + equityfull-timePosted 7mo ago
About the role
Senior ML applications and compiler engineer focusing on high-performance inference runtime, compiler optimizations, and mapping neural network workloads to NVIDIA LPX platforms.
Responsibilities
- Build, develop, and maintain high-performance runtime and compiler components, focusing on end-to-end inference optimization.
- Define and implement mappings of large-scale inference workloads onto NVIDIA’s systems.
- Extend and integrate with NVIDIA’s SW ecosystem, contributing to libraries, tooling, and interfaces for model deployment across platforms.
- Benchmark, profile, and monitor key performance metrics to ensure efficient mappings of neural network graphs to inference hardware.
- Collaborate with hardware architects and design teams to feedback software observations and co-design features for performance gains.
- Prototype and evaluate new compilation and runtime techniques, including graph transformations, scheduling, and memory/layout optimizations for spatial processors.
- Publish and present technical work on novel compilation approaches for inference and spatial accelerators at top-tier venues.
Qualifications
- MS or PhD in Computer Science, Electrical/Computer Engineering, or related field, or equivalent experience, with 5 years of relevant experience.
- Strong software engineering background with proficiency in systems-level programming (C/C++ and/or Rust) and solid CS fundamentals in data structures, algorithms, and concurrency.
- Hands-on experience with compiler or runtime development, including IR design, optimization passes, or code generation.
- Experience with LLVM and/or MLIR, including building custom passes, dialects, or integrations.
- Familiarity with deep learning frameworks such as TensorFlow and PyTorch, and experience with portable graph formats such as ONNX.
- Solid understanding of parallel and heterogeneous compute architectures (GPUs, spatial accelerators, or other domain-specific processors).
- Strong analytical and debugging skills, with experience using profiling, tracing, and benchmarking tools to drive performance improvements.
- Excellent communication and collaboration skills across hardware, systems, and software teams.
- Ideal candidates will have direct experience with MLIR-based compilers or other multilevel IR stacks, especially for graph-based deep learning workloads.
Skills
Required:C/C++ or RustLLVM/MLIRIR design / compiler optimizationsTensorFlow / PyTorchONNX
Benefits
- equity
- benefits (see company benefits link)
Last updated Jul 17, 2026. Interested? Apply on the company site.
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