Senior Physical Design Methodology Engineer, Innovus Flows
NVIDIA· Engineer, Phys Design
Santa Clara, CA, Austin, TX, Hybrid (Remote (CA)), Hybrid (Remote (TX))$168k - $264.5kfull-timePosted 7mo ago
About the role
Physical design methodology engineer focused on PD flows and Innovus-based flows to deliver best-in-class PPA at scale across NVIDIA products, collaborating with RTL, synthesis, DFT, foundry, timing, and cross-functional teams; leveraging AI/ML to improve CAD performance and productivity.
Responsibilities
- Developing innovative physical design methodologies for implementation of GPU, CPU, Network processors and SOC, with emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes
- Work with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all our product lines
- Use AI/ML approaches to CAD to improve design performance and turnaround time, while improving efficiency and productivity of designers
Qualifications
- MS in Electrical or Computer Engineering (or equivalent experience)
- Minimum 7 years of experience in Physical Design; emphasis on methodology and flow development is highly preferred
- Proven track record of PPA improvement on high performance and low power designs in advanced technology nodes
- Strong understanding of physical design optimization and routing methodologies at place, cts, route and postroute, especially power and area efficient setup and hold optimization
- Strong background in STA, extraction, timing and RC correlation
- Experience in low power design with UPF, and use of FSDB/SAIFs for power optimization
- Solid understanding of EM and IR analysis and closure
- Understanding of synthesis, hierarchical design, pinning and budgeting flows
- Experience with power distribution networks, Design for Yield and Manufacturability and thermal management
- Expertise in industry standard EDA tools and programming/scripting languages such as TCL, Perl, Python, and C++
Skills
Required:Physical Design methodology developmentPPA optimizationSTA, extraction, timing, RC correlationLow power design with UPFEM/IR analysis and closureSynthesis, hierarchical design, pinning and budgetingPower distribution networksEDA tools & scripting
Benefits
- equity
- benefits
Last updated Oct 23, 2026. Interested? Apply on the company site.
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