Senior ASIC Verification Engineer
NVIDIA· Engineer, Verification
US, TX, Austin$136k - $218.5kfull-timePosted 7mo ago
About the role
ASIC verification engineer focusing on system-level IP verification for multiple projects, with emphasis on verification methodologies, UVM-based environments, and end-to-end IP verification in a SOC context.
Responsibilities
- Design and maintain the unit level/sub-system Verification environment.
- Understand the architecture specifications, develop and carry out the test plan to verify the design.
- Create UVM components, sequences, tests and scoreboards.
- Sign off on the verification efforts with very high-quality code and functional coverage.
- Launch regressions, resolve the issues, and make forward progress towards achieving the DV milestone targets
- Automate the manual steps involved in launching build, regression, and triage.
- Collaborate with architects, designers, and software engineers to achieve project goals.
- Proactively contributes to improving the efficiency of the testbenches by embracing the latest techniques.
- Responsible for end-to-end verification of IPs, ensuring the highest quality delivery.
Qualifications
- Bachelor’s or Master’s degree in Computer or Electrical Engineering (or equivalent experience) with 3 years of relevant experience.
- Proficient with System Verilog, UVM required and OOPS based programming.
- Strong coding skills in Python or other industry-standard scripting languages.
- Strong understanding of RTL design (Verilog).
- Good understanding of computer architecture fundamentals.
- Familiarity with verification tools such as VCS or equivalent simulation tools, and debug tools like Verdi.
Skills
Required:SystemVerilogUVMPythonVerilog
Nice to have:VCS/Simulation ToolsVerdi
Benefits
- equity and benefits package (see company benefits)
Last updated Oct 23, 2026. Interested? Apply on the company site.
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