Senior Mixed Signal Design Engineer
NVIDIA· Engineer, ASIC Mixed Signal Design
Santa Clara, CA$168k - $264.5k + equityFull-timePosted 7mo ago
About the role
Senior Mixed-Signal/Analog/IO Circuit Design Engineer focused on high-speed memory I/O interfaces and mixed-signal design in deep submicron CMOS FinFET processes, involved through all stages from development to productization.
Responsibilities
- Mixed-Signal/Analog circuit build for High Speed Memory I/O Interfaces
- Solve challenge of circuit development in deep submicron CMOS FinFET processes
- Take designs through productization and be involved in all stages of development
- Work with multi-functional teams to optimize the designs
Qualifications
- BSEE or MSEE or equivalent experience
- 8+ years of high speed memory (LPDDR, DDR, GDDR, HBM) or SerDes related design experience
- System level timing budgets, specs and analysis
- In-depth understanding of deep submicron CMOS FinFET process and circuit design issues
- Familiarity with device reliability, ESD and Latch-Up requirements
- Lead layout development and understand all ESD/Latch-Up, reliability rules
- Broad circuit design and implementation knowledge with significant depth
- Working Knowledge of package substrate, board design and power delivery is a plus
- Strong background of Cadence custom design tools, various circuit simulators like Hspice, XA, FineSim, Spectre
- Solid understanding of Verilog, Nanotime, Matlab is a plus
- Hands on with Lab test and measurement equipment is a plus
Skills
Required:High-speed memory interface designCMOS FinFET circuit designLayout and ESD/Latch-UpCircuit simulation tools
Nice to have:Verilog/Nanotime/Matlab
Benefits
- equity
- comprehensive benefits package
Last updated Jul 3, 2026. Interested? Apply on the company site.
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