Senior Mixed Signal Design Engineer
NVIDIA· Engineer, ASIC Mixed Signal Design
Santa Clara, CA$168k - $264.5kFull-timePosted 7mo ago
About the role
Senior Mixed-Signal/Analog/IO Circuit Develop Engineer role focused on high-speed memory I/O interfaces and SerDes in CMOS FinFET processes. Involves design, productization, architecture contribution, and cross-functional collaboration.
Responsibilities
- Mixed-Signal/Analog circuit design for High-Speed Memory I/O Interfaces
- Solve challenges of circuit designs in the latest CMOS FinFET processes
- Take designs through productization and be actively involved in all stages of development
- Work with multi-functional teams to optimize the design
- Contribute to the architecture definition and development of next-generation and future memory systems and interfaces
Qualifications
- MS/PhD in Electrical Engineering or equivalent experience
- 4+ years of well-rounded high-Speed DRAM (LPDDR5/6, DDR4/5, GDDR5/6/7, HBM3/4) or other SerDes interface related design experience
- In-depth understanding of deep submicron CMOS FinFET process and related circuit design issues
- Familiarity with device reliability, ESD, and Latch-Up requirements
- Understanding of system-level timing budgets, specs, and analysis
- Knowledge of Verilog, Nanotime, Matlab, or similar tools (plus)
- Solid background of Cadence custom develop tools, various circuit simulators like Hspice, XA, FineSim, Spectre
- Hands-on experience of silicon debug with Lab test and measurement equipment (plus)
- Strong understanding of the package substrate, board development, and power delivery (plus)
Skills
Required:High-Speed DRAM/SerDes design
Benefits
- Equity and benefits package available
- Competitive salaries and comprehensive benefits
Last updated Jul 3, 2026. Interested? Apply on the company site.
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