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Senior Mask Design Engineer - Hardware

NVIDIA· Engineer, Mask Design
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Santa Clara, CA$132k - $235.8kFull-timePosted 7mo ago

About the role

Senior Mask Layout Design Engineer responsible for physical layout of mixed-signal functions in sub-micron CMOS technologies, collaborating with ASIC/mixed-signal teams, and participating in floor planning, custom layout, and verification.

Responsibilities

  • Perform physical layout for mixed-signal functions like PLLs, high-speed SerDes, ADCs, and ESD structures in sub-micron CMOS technologies using Cadence tools.

Qualifications

  • BSEE or equivalent experience
  • Minimum 7+ years industry experience in Mask and Layout Design
  • Deep understanding of analog circuit layout concepts in submicron CMOS technologies
  • Proficiency with Cadence custom circuit design tools (Viruoso)
  • Experience with verification tools such as Dracula, Hercules, Calibre, and Primeyield
  • Strong teamwork, interpersonal skills, enthusiasm and positive energy
  • Proficiency in scripting languages (Perl, Python, SKILL)
  • Knowledge of DRC and LVS checking flows and ability to customize decks

Skills

Required:BSEE or equivalentCadence VirtuosoVerification toolsScriptingDRC/LVS workflows

Benefits

  • Equity
  • Benefits (see NVIDIA benefits page)
Last updated Jul 3, 2026. Interested? Apply on the company site.

About NVIDIA

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