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Senior VLSI Integration Engineer

NVIDIA· Engineer, ASIC
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Hybrid (Tel Aviv, Israel), Hybrid (Raanana, Israel), Hybrid (Beer Sheva, Israel), Hybrid (Yokneam, Israel)full-timePosted 7mo ago

About the role

ASIC engineer for NVIDIA's SOC group focusing on SOC design automation, RTL integration, chip build and assembly, and padring design/verification. Collaborates across Functional Design, DFT, Design Verification, System Verification, STA, Physical Design, and other teams to build complex networking chips.

Responsibilities

  • Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).
  • Be exposed and work on a variety of functional and structural challenges, including functional debug, physical design readiness, emulation, and resolving design quality issues.
  • Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.
  • Taking part in flows development and deployment.

Qualifications

  • B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
  • 7+ years of actual design experience in chip design
  • Solid hands-on RTL design skills in System-Verilog
  • Proficiency in at least one scripting language like Python, Bash, Tcl.

Skills

Required:RTL designScriptingCross-functional collaboration
Last updated Jul 3, 2026. Interested? Apply on the company site.

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