Senior Package Layout Engineer
NVIDIA· Engineer, Sys Design
Hsinchu, TaiwanFull-timePosted 7mo ago
About the role
Senior IC Packaging Design Engineer focused on delivering state-of-the-art high-speed interconnect systems for NVIDIA products, collaborating with multiple design teams to develop complex IC substrate layouts and optimize packaging for high-speed ASICs.
Responsibilities
- Collaborate to implement high speed and PDN design for ASIC packages
- Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using APD or SiP tools
- Optimize package pin out incorporating system level trade-offs of pins assignment
- Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations
- In close co-operation with the SI/PI/HW design teams and product teams
- Planning, ensuring stakeholder management and leading projects from start to finish
Qualifications
- B.Sc. Electrical Engineering or equivalent experience
- Minimum of 5+ years hands-on experience in Package or/and PCB Layout; including high speed design signal integrity practice; PDN designing and planning
- Experience in substrate layout of wire bond and flip chip packages, preferred
- Knowledge in substrates or board manufacturing process
- Significant background with APD or SiP and/or other PCB layout tools
- English communication skills (written and verbal) required
Skills
Required:High-speed design and signal integritySubstrate layout for wire bond and flip chip packagesAPD or SiP tools
Nice to have:CAD/EDA tools (Sigrity, PowerSI, Ansys SIwave/HFSS)Scripting
Benefits
- (Not specified in description)
Last updated Jul 3, 2026. Interested? Apply on the company site.
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