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Senior Chip Design Verification Engineer

NVIDIA· Engineer, ASIC
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Tel Aviv, IsraelFull-timePosted 7mo ago

About the role

Senior Chip Design Verification Engineer in NVIDIA's Networking Silicon engineering team, focusing on designing and verifying high-speed communication devices with high throughput and low latency. On-site role in Tel Aviv, Israel.

Responsibilities

  • Join Tel Aviv group, working in a combined design and verification team which develops Phy Layer IP within the Networking silicon.
  • Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
  • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

Qualifications

  • B.Sc in Electrical Engineering or equivalent experience.
  • 5+ years of validated experience in RTL Frontend ASIC Design or Verification (Chip Design). Less experienced engineers with outstanding academic records will also be considered.
  • Strong debugging, problem-solving and analytical skills.
  • A great teammate with strong communication and interpersonal skills.

Skills

Required:RTL Frontend ASIC Design or VerificationDebugging
Nice to have:VerilogSpecman
Last updated Jul 3, 2026. Interested? Apply on the company site.

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