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Senior Custom SOC IP Verification Engineer

NVIDIA· Engineer, Verification
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Bengaluru, IndiaFull-timePosted 7mo ago

About the role

Senior level role focused on ASIC/SoC/IP verification for NVIDIA, collaborating across architecture, software, design, modeling, emulation, and post-silicon validation to deliver verified custom SOCs and IPs with strong emphasis on planning, coverage, and performance verification.

Responsibilities

  • Lead ASIC design verification for various processing blocks in a SOC, including planning, execution, Coverage and methodology development.
  • Collaborate with multiple teams (Architecture, SW/FW, Design, Modeling, Emulation, Post-Silicon Validation) to ensure comprehensive verification plans.
  • Support engineering teams in delivering solutions for purpose-built ASICs and collaborate with IP development teams for IP identification, selection, and licensing.
  • Analyze SOC and IP architecture, develop verification plans, and establish performance metrics.
  • Work with partners in a co-development environment during development, debug, and bringup.
  • Plan tests, achieve coverage closure, and enable customer TB infrastructure.
  • Validate use cases for power-on and boot requirements.

Qualifications

  • Proficient in design verification tools like Synopsys VCS, Cadence Xcelium Simulator, Verdi, JasperGold, and VC Formal.
  • Consistent track record of first-pass success in ASIC Development.
  • Holds a B.S. or M.S. degree in Computer Engineering or Electrical Engineering, with 5+ years of experience in ASIC, IP, or SoC design verification.
  • Skilled in handling mixed language UVM and C++ testbenches, interpreting functional specs, and building comprehensive test plans.
  • Experienced in developing tools and infrastructure using Perl or Python, with a strong background in AMBA protocols (AXI, ACE, CHI, ATB).
  • Hands-on experience with subsystems in new technologies like ARM CPU, LPDDR, HBM, GPUs, DLA, PCIe, and Network on chip, including performance verification.

Skills

Required:Design verificationUVMC++Perl or PythonAMBA protocols
Last updated Jul 3, 2026. Interested? Apply on the company site.

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