Senior Verification Engineer - Hardware
NVIDIA· Engineer, Verification
Hybrid (Bengaluru, India), Hybrid (Hyderabad, India)UnknownPosted 7mo ago
About the role
Senior verification engineer role focused on building UVM-based verification environments for automotive chips and systems, with system-level verification in C/C++, and collaboration across architects, designers, FPGA and post-silicon teams.
Responsibilities
- Architect the testbenches and craft verification environment using UVM methodology
- Define test plans, tests and verification infrastructure for modules, clusters and system
- Build efficient and reusable bus functional models, monitors, checkers and scoreboards
- Implement functional coverage and own verification closure
- Work with architects, designers, FPGA and post-silicon teams to ensure that your unit is robust
Qualifications
- BTech/MTech with 5+ years of experience in verification closure of complex Unit, Sub-system or SOC level verification
- Experience in CPU verification, Memory controller verification, Interconnect verification (preferred)
- Experience in High Speed IO verification (UFS/PCIE/XUSB) (preferred)
- 10G/1G Ethernet MAC and Switch (preferred)
- Bus protocols (AXI/APB) (preferred)
- System functions like Safety, Security, Virtualization and sensor processing (preferred)
- Experience in verification methodologies like UVM/VMM (required)
- Exposure to industry standard verification tools for simulation and debug (required)
- Exposure to Formal verification would be excellent
- Good debugging and analytical skills
- Good interpersonal and collaboration skills for cross-cultural teams in a matrix organization
Skills
Required:UVMSystemVerilogC/C++VIP/USS methodologiesDebuggingCommunication
Nice to have:AXI/APBUFS/PCIE/XUSBFormal verification
Benefits
- Competitive salaries
- Comprehensive benefits package
Last updated Jul 3, 2026. Interested? Apply on the company site.
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