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Senior IP DV Engineer - NOC IP

NVIDIA· Engineer, Verification
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BengaluruFull-timePosted 7mo ago

About the role

Senior Verification Engineer to verify design and implementation of memory subsystem units for GPUs and SOCs at NVIDIA. On-site role in Bengaluru, India, focusing on advanced verification methodologies, IP/sub-system verification, and collaboration with cross-functional teams.

Responsibilities

  • Verify the ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies.
  • Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
  • Develop test plans, tests and verification infrastructure for complex IPs/sub-systems.
  • Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
  • Work on advanced verification methodologies like SV/UVM.
  • Perform functional coverage driven verification closure.
  • Collaborate with architects, designers, and pre and post silicon verification teams to accomplish tasks.

Qualifications

  • B.Tech./ M.Tech., or equivalent experience.
  • 5+ years of relevant experience.
  • Experience in verification of complex IPs/units and sub-systems.
  • Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies.
  • Expertise in Verilog.
  • Knowledge in SystemVerilog or similar HVL / UVM or VMM.

Skills

Required:VerilogSystemVerilog / UVMSV/UVMFunctional coverageRandom stimulusBus functional models
Nice to have:Assertion-based verificationDebuggingScripting

Benefits

  • Competitive salaries
  • Generous benefits package
  • Equal opportunity employer
  • Diversity and inclusion policies
Last updated Jul 3, 2026. Interested? Apply on the company site.

About NVIDIA

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