Senior SRAM Circuit Design Engineer
NVIDIA· Engineer, ASIC
BengaluruUnknownPosted 7mo ago
About the role
Senior SRAM circuit design engineer role within NVIDIA’s Digital IP group focusing on embedded SRAM design, SRAM compiler development, and collaboration with SOC design, silicon test, and productization teams to deliver high-performance SRAM macros.
Responsibilities
- Embedded SRAM design: Transistor-level circuit design, supervising layout implementation, physical and logical verification, and debug of SRAM macros.
- SRAM compiler development: Envisioning, defining, and coding more efficient ways to automate the simultaneous assembly and validation of multiple unique SRAM macros using NVIDIA's extensive compute resources.
- Advanced development: Exploring the potential of future process nodes and developing techniques to achieve optimal power, performance, and area characteristics.
- Guiding SOC design, silicon test, and productization efforts: Collaborate with SOC design partners to help them achieve their overall performance and cost goals, guide the silicon test and characterization efforts, and work with productization teams to prepare new silicon for real-world applications.
Qualifications
- BSEE minimum (or equivalent experience), MSEE or PhD preferred
- 3+ years of SRAM design experience with a strong background in digital circuit design, layout, and validation on advanced FinFET processes
- Prior design experience in single-port, dual-port, or register file SRAM-based macros required, including complex circuits like self-timed logic and sense-amplifiers
- Python scripting ability to parse data and automate tasks
- Successful track record of delivering designs to production
Skills
Required:Embedded SRAM designSRAM compiler developmentDigital circuit designPython scripting
Benefits
- Skip any optional benefits not listed in description (not provided)
Last updated Jul 3, 2026. Interested? Apply on the company site.
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