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Senior Silicon Physical Design Engineer

Google
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Tel Aviv; HaifaFull-timePosted 6mo ago

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions that power Google’s direct-to-consumer products. Collaborate across design, DFT, architecture, and packaging to deliver high-performance, power-efficient SoC designs for AI infrastructure.

Responsibilities

  • Use problem-solving and simulation techniques to ensure performance, power, and area (PPA) are within defined requirements.
  • Collaborate with cross-functional teams to debug failures or performance shortfalls and meet program goals in lab or simulation.
  • Design chips, chip-subsystems, or partitions within subsystems from synthesis through place and route, and sign off convergence, ensuring that the design meets the architecture goals of power, performance, and area.
  • Develop, validate, and improve Electronic Design Automation (EDA) methodology for a specialized sign off or implementation domain to enable cross-functional teams to build and deliver blocks that are correct by construction and ease convergence efforts.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 5 years of experience with System on a Chip (SoC) cycles.
  • Experience with advanced design, including clock/voltage domain crossing, DFT, and low power designs.
  • Experience in high-performance, high-frequency, and low-power designs.

Skills

Required:System on a Chip (SoC) designEDA methodologiesclock/voltage domain crossingDFTlow power design
Nice to have:Scripting
Last updated Oct 23, 2026. Interested? Apply on the company site.

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