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Senior Systems Prototyping and Emulation Engineer

NVIDIA· Engineer, ASIC
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Santa Clara, CA$168k - $264.5kFull-timePosted 5mo ago

About the role

Senior Systems Prototyping and Emulation Engineer to build FPGA prototypes and hardware emulation environments for GPUs, SOCs, NICs, and Switches, enabling pre-silicon software development and scalable validation on industry-standard FPGA prototyping and emulation platforms. On-site in Santa Clara, CA.

Responsibilities

  • Build FPGA prototypes and hardware emulation environments by making RTL FPGA/emulation-friendly, partitioning the design, and taking it through synthesis, place-and-route, and emulator compilation flows.
  • Improve performance of FPGA prototypes and emulation platforms, analyze timing/performance bottlenecks, and generate bitstreams/images.
  • Bring up designs on FPGA prototyping and hardware emulation platforms and drive complex debug and problem-solving activities.
  • Release prototypes and emulation environments to internal customers and support them through debug, validation, and software enablement.
  • Understand the design and implementation, define configurations, develop/modify bring-up and testing infrastructure, and verify correctness of the design.
  • Understand complex system topologies with multiple ASICs to realize DGX systems on prototyping platforms and emulators.
  • Work closely with architects, designers, verification engineers, validation teams, and software teams to accomplish project goals.
  • Enable pre-silicon software development, validation, and performance analysis using FPGA prototypes and hardware emulation environments.
  • Develop and optimize emulation-friendly validation infrastructures, including high-performance software interfaces and scalable debug methodologies.

Qualifications

  • BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 8+ years of experience, or MS with 6+ years of proven experience in FPGA prototyping and/or hardware emulation.
  • Strong understanding of FPGA prototyping and hardware emulation architectures, devices, flows, and tools.
  • Hands-on experience with Synopsys ProtoCompiler or Synplify Premier, Xilinx Vivado, and familiarity with emulation platforms such as Synopsys ZeBu or Siemens Veloce.
  • Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
  • Knowledge of Verilog, SystemVerilog, and digital design concepts.
  • Understanding of industry-standard protocols such as PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency.
  • Hands-on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).
  • Strong expertise in developing and optimizing emulation-friendly C/C++ testbenches and transactors that can operate efficiently at emulation speeds; minimizing host-emulator communication bottlenecks; architecting scalable software-driven validation environments for high-performance SoCs and multi-ASIC systems.
  • Ability to develop efficient DPI/PLI/SystemC-based interfaces and software infrastructures that enable high-speed validation, debug, and bring-up on hardware emulation platforms.

Skills

Required:FPGA prototyping and hardware emulationRTL-to-bitstream flowSynopsys ProtoCompiler or Synplify PremierXilinx VivadoEmulation platforms (ZeBu, Veloce, HAPS)ASIC design/verification tools (VCS, Verdi, GDB)Verilog/SystemVerilogPCIe, CXL, NVLINK, USB, CHIC/C++ emulation-friendly testbenchesDPI/PLI/SystemC interfaces

Benefits

  • Equity
  • Benefits (as per company offerings)
Last updated Oct 9, 2026. Interested? Apply on the company site.

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