Senior Physical Design Engineer
NVIDIA· Engineer, Phys Design
Santa Clara, CA$168k - $264.5kfull-timePosted 5mo ago
About the role
Senior Physical Design Engineer responsible for driving physical design and timing from netlist to GDS, collaborating with mixed-signal teams, performing timing closure and physical verification, and enabling robust design flows.
Responsibilities
- Drive physical design and timing from netlist to gds.
- Partner with mixed signal teams to integrate Analog IO’s and macros.
- Work on multi-mode and multi-corner timing closure, RC extraction, Cross talk, IR drop and EM analysis.
- Work with the Front-end teams to create and update timing constraints.
- Perform Physical verification DRC, ERC, LVS, Antenna checks and other checks.
- Debugging timing violations and implementing functional, Timing ECO’s and perform formal verification.
Qualifications
- BS (or equivalent experience) in Electrical or Computer Engineering with 6+ years' experience or MS (or equivalent experience) with 3+ years' experience in physical design.
- Experienced in Synopsys or Cadence place and route, physical design and timing tools.
- Ability to form methodologies and automate flows.
- Scan insertion and DFT knowledge is a plus
Skills
Required:Physical designPlace and Route tools
Nice to have:DSP/Analog IO integration
Benefits
- You will also be eligible for equity and benefits.
Last updated Aug 7, 2026. Interested? Apply on the company site.
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