Principal Performance and Manufacturing Architect
NVIDIA· Engineer, ASIC
Hybrid (Santa Clara, CA), Remote$232k - $368kfull-timePosted 4mo ago
About the role
Senior-level role focused on building first-principles models linking design intent to manufacturing outcomes, validating models through silicon, and defining methodologies and experiments to ensure margins and reliability across NVIDIA's VF, DVFS, and defect mechanisms.
Responsibilities
- Own the physics, from mechanism to margin. Build first-principles modelsConnecting AVF, defect mechanisms, and DVFS transients to field FIT, system-level yield, and DPPM vs. coverage — calibrated per node and population shift — so every margin term in the V/F curve and P-state table is named, sourced, and defensible.
- Set the screen that resolves escapes. Specify ATE and SLT voltage, frequency, and timing conditions that capture worst-case transient VF windows — making it unambiguous whether a marginal defect or timing violation is detected or escapes at every manufacturing stage.
- Make the POR the authoritative source. Author the methodology document for each program and drive alignment across build, product definition, reliability, and test engineering — so every team is making decisions from the same model.
- Prove the model before production. Own the per-release validation plan — split-screen experiments, sample sizes, statistical acceptance criteria, and production monitoring — through QS sign-off.
Qualifications
- BSEE / MSEE / PhD or equivalent experience, with 15+ years in the field.
- Deep, hands-on understanding of how transient VF behavior develops worst-case stress conditions for marginal defects and timing violations — you know the mechanisms, not just the models.
- Demonstrated experience building first-principles models connecting physical parameters to manufacturing outcomes, calibrated through real silicon.
- A clear track record defining manufacturing test specifications on a shipped product, with each margin term explicitly sourced and owned.
- Built and ran silicon validation experiments that proved models from NPI through production, not as a supporting contributor, but as the person who developed and was responsible for the experiments.
Skills
Required:First-principles modelingVF/ DVFS transient analysisManufacturing test specifications
Benefits
- equity
- benefits
Last updated Sep 25, 2026. Interested? Apply on the company site.
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