Post-Silicon Validation and Methodology Engineer
NVIDIA· Engineer, ASIC
Santa Clara, CA$136k - $218.5kFull-timePosted 4mo ago
About the role
Hardware engineer focused on bring-up, validation, and methodology for next-generation silicon. Develops test infrastructure, AI-assisted lab workflows, and coverage strategies to find issues before software is production-ready, improving velocity across silicon programs.
Responsibilities
- Own bring-up, validation, qualification, tuning, and productization plans for next-generation silicon — from first power-on through PVT sign-off.
- Partner across architecture, build, firmware, and software teams to define requirements for power management and clocking features, then drive coverage from pre-silicon through production.
- Build and deploy AI assisted lab workflows to automate bring-up telemetry and silicon measurement data evaluation, provide anomaly detection on regression results, and support debug-triage tooling.
- Build the test infrastructure, characterization methodologies, and bring-up playbooks to shift post-silicon coverage left and raise velocity across programs.
- Lead root-cause analysis on HW/SW interaction issues with measurement field, instrumentation judgment, and hypothesis rigor to close them under schedule pressure.
- Identify where current processes break and redesign them (bring-up sequencing, debug forums, regression frameworks, lab metrics) to ensure continuous improvement.
Qualifications
- BS or MS in Electrical or Computer Engineering (or equivalent experience), plus 5+ years in silicon bring-up, validation, debug, or productization.
- Deep fundamentals across digital development, microarchitecture, timing, clocking, power, noise, and control systems, with ability to reason across HW/SW boundary in lab constraints.
- Hands-on lab proficiency: oscilloscopes, logic analyzers, power analyzers, and ability to pick the right instrument for bring-up questions.
- Strong programming and scripting proficiency: Python, C/C++; experience building lab automation or test infrastructure adopted by others, not just personal scripts.
- Proficiency in using AI tools to accelerate silicon validation: automated analysis of bring-up logs, regression data, or lab instrumentation output; anomaly detection on silicon datasets; or LLM-assisted debug triage (with awareness of when measurement must remain manual).
Skills
Required:Bring-up and validation planningHW/SW boundary reasoningLab instrumentationScripting and automation
Nice to have:AI-assisted validation
Benefits
- equity
- benefits package
- competitive salaries and comprehensive benefits package
Last updated Oct 16, 2026. Interested? Apply on the company site.
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