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Senior IP Design Verification Engineer - XBAR IP

NVIDIA· Engineer, Verification
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Bengalurufull-timePosted 4mo ago

About the role

Senior Verification Engineer to verify memory subsystem IP design and implementation for NVIDIA GPUs/SoCs, using advanced verification methodologies and collaborating with cross-functional teams.

Responsibilities

  • Verify ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies.
  • Understand design and implementation, define verification scope, develop verification infrastructure and verify design correctness.
  • Develop test plans, tests and verification infrastructure for complex IPs/sub-systems.
  • Build reusable bus functional models, monitors, checkers and scoreboards following coverage-driven verification methodology.
  • Work on advanced verification methodologies like SV/UVM.
  • Perform functional coverage driven verification closure.
  • Collaborate with architects, designers, and pre/post silicon verification teams.

Qualifications

  • B.Tech./ M.Tech., or equivalent experience
  • 4+ years of relevant experience
  • Experience in verification of complex IPs/units and sub-systems
  • Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies
  • Expertise in Verilog
  • Knowledge in SystemVerilog or similar HVL / UVM or VMM

Skills

Required:VerilogSystemVerilog / HVL / UVM / VMMSV/UVM
Nice to have:Debugging and scripting
Last updated Jun 26, 2026. Interested? Apply on the company site.

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