Senior Digital Design Engineer
NVIDIA· Engineer, ASIC
Santa Clara, CA, Austin, TX, Redmond, WA$136k - $218.5k + equityfull-timePosted 4mo ago
About the role
Senior Digital Design Engineer in the Semi-Custom Silicon products group focused on NVLink Fusion based AI infrastructure System-on-Chips. Responsible for architectural trade-offs, RTL implementation, verification, and IP integration to deliver high-performance, area- and power-efficient blocks.
Responsibilities
- Analyze architectural requirements, perform trade-off analysis for implementation, and deliver high performance, area and power efficient RTL blocks.
- Craft micro-architecture specifications, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean block.
- Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration engineers to meet block goals in a timely manner.
- Identify potential IP solutions for specific use cases and assist in selecting, customizing and integrating the right IP solutions.
Qualifications
- Bachelors or Master's Degree, or equivalent experience in Electrical Engineering or Computer Engineering
- 5+ years of relevant work experience
- Experience with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, UCIE etc.
- Proven track record of delivering high bandwidth datapath blocks (data movers, protocol adaptors, network-on-chip, arbiters, schedulers)
- Deep understanding of ASIC design flows and methodology
- Strong analytical and interpersonal skills, excellent teammate
Skills
Required:RTL designhigh-speed interfacesmicro-architectureASIC design flowscollaborative teamwork
Benefits
- Equity
- Comprehensive benefits package (as described)
Last updated Jun 26, 2026. Interested? Apply on the company site.
About NVIDIA
World Leader in AI Computing
NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.
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