Senior GPU Floorplan Design Engineer
NVIDIA· Engineer, ASIC
BengaluruPosted 4mo ago
About the role
GPU Floorplan design engineer role focused on early planning, feasibility studies, and physical trade-offs to influence next-generation GPU development from Bengaluru, India. role sits at intersection of architecture, RTL, performance analysis, and physical design with emphasis on area, timing, and power considerations.
Responsibilities
- Develop and optimize floorplans during early chip development with architects, design leads, physical design leads and package leads.
- Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities.
- Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and physical implementation decisions.
- Build tools and improve existing infrastructure to optimize chip area and speed of execution.
Qualifications
- B.Tech./ M.Tech. with 5+ years of experience in floorplan, SOC planning, ASIC Physical design or related roles.
- A deep hardware engineering background with a concentration in VLSI and/or Computer Architecture.
- Hands-on experience with chip-level or subsystem-level floorplanning and physical planning.
- Solid understanding of timing, congestion, power distribution, and physical constraints.
- Experience in Verilog, System Verilog or similar HVL.
- Experience with CAD and physical design methodologies (flow and tool development), chip floorplan, power/clock distribution, packaging, P&R and timing closure.
- Strong communication and interpersonal skills and ability & desire to work as a great teammate.
- Python, Perl and C/C++ programming language experience.
Skills
Required:floorplanningtimingVLSI/Computer ArchitectureHDLCAD/physical design methodologiesprogramming
Last updated Jun 26, 2026. Interested? Apply on the company site.
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