PCIe IP Verification Engineer
NVIDIA· Engineer, Verification
Bengalurufull-timePosted 4mo ago
About the role
Senior Verification Engineer to verify PCI Express controllers for GPUs and SOCs using state-of-the-art verification methodologies, with collaboration across архитектures and verification teams.
Responsibilities
- Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.
- Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
- Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
- Collaborate with architects, designers, and pre and post silicon verification teams to accomplish tasks.
Qualifications
- B.Tech./ M.Tech or equivalent experience
- 2+ years of relevant experience
- Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog
- Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
- Experience in developing and working in functional coverage based constrained random verification environments
- Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug
Skills
Required:VerilogSystemVerilogUVMFunctional coveragePCI Express
Nice to have:Scripting
Benefits
- With competitive salaries and a generous benefits package
Last updated Jun 26, 2026. Interested? Apply on the company site.
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