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Senior ASIC Design Engineer - XBAR IP

NVIDIA· Engineer, ASIC
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BengaluruFull-timePosted 4mo ago

About the role

Senior design engineer role focused on memory subsystem components for NVIDIA Graphics processors, with responsibilities spanning micro-architecture, RTL implementation, verification, timing, and collaboration across multiple teams including HW architects, verification, timing/physical design, FPGA and software.

Responsibilities

  • Own micro-architecture and RTL development of design modules.
  • Micro-architect features to meet performance, power and area requirements.
  • Work with HW architects to define critical features.
  • Collaborate with verification teams to verify the correctness of implemented features.
  • Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.
  • Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested.
  • Work on post-silicon verification and debug.

Qualifications

  • BS / MS or equivalent experience.
  • 5+ years of design experience.
  • Experience in RTL design of complex design units for at least two or three projects.
  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Expertise in Verilog.

Skills

Required:Micro-architecture designRTL designVerilogDesign verification
Nice to have:Scripting
Last updated Jun 26, 2026. Interested? Apply on the company site.

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