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Senior Product Development Engineer

NVIDIA· Engineer, Product Development
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Santa Clara, CA$136k - $212.8kfull-timePosted 4mo ago

About the role

Senior Product Development Engineer focused on bring-up of innovative SOCs, test strategy, PDE characterization, and reliability qualification, collaborating with external vendors and internal teams to drive test coverage, yields, and failure analysis from wafer to package level.

Responsibilities

  • Serve as the primary technical interface between ATE and internal partners for test strategy, ATE bring-up, and silicon qualification, driving alignment on PDE char plan, DFT coverage & engineering FA for root-cause & preventive action.
  • Define & drive PDE Silicon characterization plans covering key tests (scan, mbist, IObist, functional) & features covering analog mixed-signal designs.
  • Ensure robust test yields are achieved going from NPI to high volume manufacturing. Test yield distractors are debugged & resolved systematically to achieve the target yields.
  • Finalize overall reliability QUAL stress conditions based on product usage covering embedded, commercial, industrial & automotive needs.
  • Drive all aspects of stress testing of silicon from wafer-level to pkg. level covering silicon+pkg level reliability qualification & testing associated with it.
  • Ensure Burn-in needs for the product are evaluated, supported & deployed in NPI & MP phase.
  • Analyze & automate aging data from HTOL/pkg. qual/DVS testing & guide the team on further debug steps for further failure analysis.
  • Drive true failures from reliability evaluation to closure w/ final FA report, working with FA & foundry teams.

Qualifications

  • Bachelor's degree in Electrical Engineering (or equivalent experience) and 5+ years of relevant experience
  • Analytical and problem-solving skills, especially in solving ATE test failures with root-cause analysis.
  • Hands on experience of debugging chip level failures on ATE platform & drive FA to closure.
  • Good understanding & experience of SOC / Silicon qualifications covering exposure to HTOL, ESD/LU, HTS, TC, HAST etc.
  • Exposure to both Teradyne and Advantest platforms is a plus

Skills

Required:Test strategy and ATE bring-upPDE Silicon characterizationDebugging chip-level failures on ATE

Benefits

  • equity
  • benefits
Last updated Jun 26, 2026. Interested? Apply on the company site.

About NVIDIA

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NVIDIA invents the GPU and drives advances in AI, HPC, gaming, creative design, autonomous vehicles, and robotics.

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