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Senior SOC and IP Design Engineer, Google Cloud

Google· Google Cloud
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RemoteFull-timePosted 4mo ago

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions for Google's direct-to-consumer products. Contribute to the next generation of hardware experiences with AI and infrastructure at scale across Google Cloud and consumer products.

Responsibilities

  • Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
  • Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
  • Participate in synthesis, timing/power closure, and ASIC silicon bring-up.
  • Participate in test plan and coverage analysis of the block and SOC-level verification.
  • Communicate and work with multi-disciplined and multi-site teams.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience with digital reasoning design principles, RTL design concepts, and languages such as Verilog or System Verilog.
  • Experience with reasoning synthesis techniques to optimize RTL code, performance and power and design techniques.
  • Experience in reasoning design and debug with Design Verification (DV).

Skills

Required:RTL design (Verilog/SystemVerilog)Synthesis, timing/power closureDesign Verification (DV)Debugging and linting tools
Nice to have:Scripting (Python/Perl)

Benefits

  • Note: Benefits are not explicitly listed in the provided description.
Last updated Oct 23, 2026. Interested? Apply on the company site.

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