Senior Custom SOC/IP Verification Engineer
NVIDIA· Engineer, Verification
Santa Clara, CA, Austin, TX$168k - $310.5kfull-timePosted 3mo ago
About the role
Senior ASIC verification engineer focused on fabric and interconnect verification for SoC and IP solutions, including IP bring-up through full chip integration, with expertise in SystemVerilog, UVM, and interconnect protocols to ensure correctness, performance, and compliance of on-chip fabrics and NoC subsystems.
Responsibilities
- Responsible for ASIC design verification of fabric and interconnect IP blocks as well as full chip integration, covering DMA, routing, arbitration, ordering, flow control, and protocol compliance.
- Develop and implement test plans for fabric and interconnect verification of SoCs using UVM-based environments, targeting both IP-level and system-level scenarios.
- Design and implement constrained-random and directed SystemVerilog testbenches targeting interconnect fabrics, network-on-chip (NoC) topologies, and multi-agent SoC integrations.
- Collaborate extensively with Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation teams to ensure comprehensive first-time right verification plans and execution.
- Drive the development of silicon and platform verification strategies and methodologies for fabric and interconnect subsystems.
Qualifications
- B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent experience).
- 6+ years of experience in ASIC verification, with a strong focus on fabric, interconnect, or network-on-chip verification at both IP and full chip levels.
- Strong knowledge of SystemVerilog and UVM methodology.
- Hands-on experience with industry-standard interconnect and bus protocols (e.g., AMBA AXI, CHI, or equivalent), with solid understanding of ordering, coherency, and flow control semantics.
- Familiarity with SoC architectures, NoC topologies, and multi-initiator/multi-target interconnect designs.
- Proficiency in scripting languages (Python, Perl, TCL).
Skills
Required:SystemVerilogUVMInterconnect protocolsScripting
Benefits
- equity
- benefits (see NVIDIA benefits)
Last updated Sep 18, 2026. Interested? Apply on the company site.
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