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Senior Signal Integrity Engineer – Cryogenic Interconnects

NVIDIA· Engineer, ASIC
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Santa Clara, CA$168k - $264.5kFull-timePosted 3mo ago

About the role

Senior Signal Integrity Engineer focusing on cryogenic interconnects, modeling, simulation, lab characterization, and cross-functional collaboration to advance ultra-high-speed interconnects under cryogenic conditions.

Responsibilities

  • Develop accurate 3D EM models for PCB and interconnect structures using tools such as HFSS
  • Simulate multi-layer PCB designs under cryogenic conditions
  • Define high-speed constraints, SI specifications, and design guidelines across RF, materials, and thermal domains
  • Work on next-generation cryogenic interconnect solutions for ultra-high-speed communication
  • Collaborate closely with SI, materials, mixed-signal, and system teams to drive end-to-end interconnect performance
  • Perform lab characterization and validation using network analyzers and other measurement tools
  • Correlate simulation results with hardware measurements to improve modeling accuracy
  • Contribute to system-level understanding of interconnect behavior across PCB, package, and system domains

Qualifications

  • MS/PhD in Electrical Engineering or equivalent experience
  • 5+ years of experience
  • Strong experience in signal integrity modeling and simulation (HFSS or similar EM tools)
  • Deep understanding of high-frequency / broadband design
  • Solid understanding of multi-layer PCB design and signal behavior
  • Knowledge of PCB materials and their electrical and physical properties
  • Experience with lab measurements (VNA, high-speed characterization)
  • Background in cryogenic technologies or strong interest in developing expertise in this area

Skills

Required:3D EM modelingHFSSCryogenic designPCB designLab measurements

Benefits

  • equity
  • benefits
Last updated Sep 11, 2026. Interested? Apply on the company site.

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