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Principal Chip Lead, Silicon Co-Design Group

NVIDIA· Engineer, ASIC
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Santa Clara, CA$232k - $368kfull-timePosted 2mo ago

About the role

Technical lead for a high-impact silicon program within NVIDIA's Silicon Co-Design Group, responsible for end-to-end technical integrity of the chip, cross-functional coordination, and strategy for qualification and debugging.

Responsibilities

  • Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs.
  • Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution.
  • Help resolve the program’s hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging.
  • Steward the qualification playbook. When the playbook does not fit a situation, guide the mitigations and capture the lessons as reusable methodology for other SSG programs.
  • Shape the program’s technical narrative by surfacing key risks, trade-offs, and mitigations as decision-ready options for executive leadership.
  • Mentor Chip Leads on adjacent silicon programs and contribute to SCG-wide methodology through post-mortems and write-ups.
  • Lead the program’s Critical Debug and SCG Technical Execution forums, and represent the chip externally with early insight into technical risks.

Qualifications

  • BS or MS (or equivalent experience) in Electrical or Computer Engineering, plus over a decade of proven track record in post-silicon bring-up, validation, or system integration leadership at a major semiconductor company, including work on multiple shipped silicon products.
  • 15+ years of experience.
  • Strong end-to-end understanding of SoC and ASIC architecture, with recognized expertise in at least one subsystem such as HBM, SerDes, power and thermal, or packaging.
  • Specific examples of silicon-level impact, such as faster bring-up, fewer escapes, yield recovery, or methodology contributions — especially turning ambiguous, multi-team failure modes into root-cause closure with reusable workarounds and write-ups.
  • A track record of guiding technical decisions across functional boundaries without direct reporting authority, and translating sophisticated silicon issues into clear options for executive audiences.

Skills

Required:Technical leadership across multi-functional teamsSoC/ASIC architecture understanding

Benefits

  • Equity
  • Benefits (details available at NVIDIA benefits page)
Last updated Sep 25, 2026. Interested? Apply on the company site.

About NVIDIA

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