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Senior ASIC Verification Engineer - PMU

NVIDIA· Engineer, ASIC
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Shanghaifull-timePosted 2mo ago

About the role

Senior ASIC Engineer to help architect and implement PMU (power management unit) for AI datacenter, collaborating with software and power architecture teams to define architecture, support silicon debug, and translate micro-architecture into RTL.

Responsibilities

  • Collaborate with the production SW team and power arch team to define the architecture/micro-architecture for various power features.
  • Learn how PMU's function impacts the system and support the silicon debug.
  • Implement the micro-architecture to RTL design.

Qualifications

  • BS / MS in electrical / computer engineering.
  • 3+ years working experience, with preference given to those with MS or equivalent experience.
  • Strong communication skills and proficient oral English since this role require frequent communication with external teams mainly in USA and India.
  • Familiar with frontend ASIC design.

Skills

Required:architecture/micro-architecture definitionRTL designfrontend ASIC design
Nice to have:silicon debugging
Last updated Aug 7, 2026. Interested? Apply on the company site.

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