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Senior Mixed Signal Design Engineer

NVIDIA· Engineer, ASIC Mixed Signal Design
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Santa Clara, CA$168k - $264.5kFull-timePosted 2mo ago

About the role

Senior engineer in mixed-signal design building next-generation NVLINK, with responsibility from concept through silicon characterization of high-speed interfaces and analog circuits, collaborating with layout and post-silicon teams in a dynamic NVIDIA environment.

Responsibilities

  • Develop and implement high speed electrical/optical interfaces and analog circuits at data rates 25Gbps and higher from concept through silicon characterization.
  • Define circuit requirements and complete design from schematic, layout, and verification to characterization.
  • Conduct schematic design of deep-submicron CMOS technologies using Spectre, Hspice or similar tools.
  • Lead architecture, transistor design and verification using EDA tools such as Cadence Virtuoso.
  • Optimize circuit to meet system performance specifications.
  • Work closely with layout engineers by providing detailed floorplan and guidance for matching and high-speed routings.
  • Provide support for post-silicon bring-up and debugging.

Qualifications

  • Master of Science or Ph.D. in Electrical Engineering, Computer Engineering or related field with strong analog design background (or equivalent experience)
  • 6+ years analog design experience
  • CMOS Analog / Mixed Signal Circuit Design Experience in deep sub-micron process (especially in FINFET)
  • Experience with design and verification tools (Cadence IC design environment, analog circuit simulation tools like Spectre, HSpice, Finesim, XA)
  • Experience in crafting test bench environments for component and top level circuit verification
  • Behavioral modeling of analog and digital circuits
  • Strong debugging and analytical skills
  • Analog simulation for noise analysis, loop stability analysis, ac/dc/tran analysis, monte-carlo, etc.
  • Strong interpersonal skills and ability & desire to work as a phenomenal teammate

Skills

Required:High-speed mixed-signal designSchematic design in deep-submicron CMOSCadence VirtuosoAnalog/digital behavioral modeling

Benefits

  • Equity and benefits (as part of compensation)
Last updated Aug 14, 2026. Interested? Apply on the company site.

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