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Senior ASIC Design Verification Engineer, Google Cloud

Google
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Sunnyvale, CA, USA$163k - $236kPosted 2mo ago

About the role

Role focused on shaping the future of AI/ML hardware acceleration through verification of complex digital designs, with emphasis on TPU architecture and integration within AI/ML systems.

Responsibilities

  • Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience with design verification.
  • Experience with SystemVerilog.

Skills

Required:SystemVerilogUVMConstrained-random verification
Nice to have:Formal verification
Last updated Oct 23, 2026. Interested? Apply on the company site.

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