Verification Engineer - PCIE
NVIDIA· Engineer, Verification
BengaluruFull-timePosted 2mo ago
About the role
Verification Engineer to verify PCI Express controller design and implementation for GPUs and SOCs at IP/sub-system levels, using state-of-the-art methodologies (e.g., UVM) in a high-impact, global team.
Responsibilities
- Responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.
- Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
- Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
- Collaborate with architects, designers, and pre and post silicon verification teams to accomplish tasks.
Qualifications
- B.Tech./ M.Tech. with 2+ years of relevant experience
- Experience in verification at Unit/Sub-system/SOC level using Verilog and SystemVerilog
- Background with verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
- Experience in developing and working in functional coverage based constrained random verification environments
- Experience in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug
Skills
Required:VerilogSystemVerilogUVM / DV methodologiesCoverage driven verificationPCI Express, PCIe Gen3+Testbench development
Nice to have:scripting languagesDebugging
Benefits
- With competitive salaries and a generous benefits package
Last updated Aug 21, 2026. Interested? Apply on the company site.
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