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Senior Silicon Power Engineer

NVIDIA· Engineer, ASIC
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Bengalurufull-timePosted 1mo ago

About the role

Senior role in NVIDIA's Silicon Power Team focused on power-feature productization for flagship silicon programs. Owns power-related productization, debugging, and AI-enabled characterization to drive production decisions. Cross-functional leadership across architecture, validation, firmware, software, and production; global collaboration with India and other hubs.

Responsibilities

  • Lead the effort across architecture, validation, firmware, software, and production teams to keep the program's power and low-power productization strategy clear, executable, and on track.
  • Characterize and validate new power-saving features, debug silicon issues, and work with SW/FW teams to productize industry-defining capabilities.
  • Resolve complex silicon issues through structured hypotheses, measurement plans, and root-cause closure — and codify the fixes as reusable methodology across programs.
  • Design and deploy AI-enabled workflows to automate data analysis, metric extraction, trend checks, and report generation across multiple bring-ups — with explicit guardrails and measurable workflow impact.
  • Serve as the key technical owner for multi-functional decisions, issues, and tradeoffs across power, thermal, performance, firmware, and schedule constraints.
  • Partner with globally distributed teams — system architects, chip and board designers, SW/FW engineers, applications, reliability specialists, ATE engineers, and PMs — including counterpart engineers in India and other major hubs.

Qualifications

  • BS + 5 years, or MS + 4 years, in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) with proven post-silicon bring-up and validation of silicon power features on complex ASIC/SoC programs.
  • Hands-on expertise in power-saving mechanisms, power characterization, tester-to-system correlation, and lab fundamentals (oscilloscopes, DMM, DAQ, debuggers) with at least one productized root-cause fix.
  • End-to-end understanding of silicon behavior across architecture, firmware, validation, and platform interactions; ability to make tradeoffs across power, thermal, performance, firmware, design, validation, and schedule.
  • Demonstrated AI-enabled workflow for silicon characterization or validation with measurable impact and proper validation discipline.

Skills

Required:Power-saving featuresPower characterizationRoot-cause analysisAI-enabled workflows

Benefits

  • Not specified in description.
Last updated Aug 28, 2026. Interested? Apply on the company site.

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