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Principal System Power Management and Performance Architect

NVIDIA· Engineer, ASIC
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Santa Clara, CA, Austin, TX, Hillsboro, OR$232k - $368kFull-timePosted 1mo ago

About the role

NVIDIA seeks a Principal System Power Management and Performance Architect to define multi-generation system-level power and performance features, own HSIO power management and related architectures, lead boot and IST strategies, and coordinate datacenter-scale power management across ASIC, board, firmware, and platform layers within the Silicon Co-Design Group.

Responsibilities

  • Define the multi-generation roadmap for system-level power and performance features, grounded in prototyping, use-case analysis, and cost/benefit trade-offs across segments.
  • Own the architecture and integration strategy for HSIO power management, DVFS, P-states, and low-power features to improve product performance, power, and reliability across product lines.
  • Lead system-level boot and IST architecture defining how power and clock domains initialize, sequence, and recover across complex multi-IP systems.
  • Drive power management strategy at datacenter scale, including rack-level power telemetry and platform state coordination in high-performance environments.
  • Identify and redesign system-level processes that break under new product requirements—boot/reset flows, low-power entry/exit sequences, and control-system policies across IPs.
  • Serve as the multi-functional technical authority across architecture, ASIC, board/platform, and firmware teams to influence power-performance trade-offs.

Qualifications

  • BS or MS in EE/CE, or equivalent experience proven through the work itself
  • 15+ years of system architecture, development, and validation experience with a strong focus on power and performance-per-watt optimization in datacenter or high-performance platforms.
  • A verifiable history of guiding architecture decisions that shipped across multiple silicon programs. Ability to discuss challenging roadmap decisions and first-principles reasoning.
  • Extensive knowledge of HSIO power management, DVFS, P-states, system boot flows, and low-power entry/exit architecture, including interactions with IP, firmware, and platform layers.
  • Strong fundamentals in low-power design, power management techniques, and rack-level performance architecture.

Skills

Required:System architectureHSIO power managementPower management techniques

Benefits

  • Equity
  • Comprehensive benefits package
  • Location-based base salary and potential for bonuses/other compensation as part of total rewards
Last updated Sep 25, 2026. Interested? Apply on the company site.

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