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ASIC Methodology, Flow and Integration Engineer

NVIDIA· Engineer, ASIC
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Hybrid (Bengaluru), Hybrid (Hyderabad)on-sitePosted 1mo ago

About the role

ASIC Flow and Integration Engineer focusing on design methodology, automation, and integration for the High Speed IO team, driving full-chip and block-level integration across NVIDIA SoC and GPU projects, building modular, reusable infrastructure, and collaborating with RTL, verification, physical design, and architecture teams.

Responsibilities

  • Own the full-chip and block-level integration process across multiple NVIDIA SoC and GPU projects.
  • Stitch together RTL units and ensure seamless connectivity, and hierarchy management.
  • Define and evolve internal design methodologies to improve scalability, quality, and turnaround time.
  • Build automation pipelines using Python/Perl to streamline integration, debug, and delivery.
  • Develop modular and reusable systems that can be easily delivered and adapted across different SoC and GPU architectures.
  • Collaborate extensively with RTL, verification, physical design, and architecture teams to ensure flow compatibility and design readiness.
  • Drive full-chip debug efforts, connectivity, and functional issues across multiple hierarchies and technology nodes.
  • Contribute to continuous improvement of internal standards and mentor engineers on flow usage and integration practices.

Qualifications

  • BS or B.Tech or MS or M.tech in EE, ECE, CS, or equivalent degree with 2+ years or more experience in design integration and methodologies for ASIC design.
  • Comprehensive understanding of IP development flows, build flows is a must
  • Excellent influencing skills resulting in collaboration with cross-cultural, multi geography and matrixed teams
  • Good debugging, analytical and problem solving skills
  • Great interpersonal skills and ability to work as an excellent teammate
  • Working exposure with AI tools like Claude and Cursor would be a plus

Skills

Required:Full-chip and block-level integrationRTL integration and connectivityDesign methodologiesAutomation pipelinesCollaboration across RTL/verification/PD/architectureDebugging and problem solving

Benefits

  • [n/a]
  • Not specified in description
Last updated Aug 28, 2026. Interested? Apply on the company site.

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