Senior Software R&D Engineer, ECO Route - VLSI EDA
NVIDIA· Engineer, CAD
Santa Clara, CA / Austin, TX$168k - $310.5kPosted 1mo ago
About the role
Senior Software R&D Engineer focused on ECO routing and physical optimization in NVIDIA’s VLSI EDA efforts, developing detailed physical-design algorithms, cross-domain optimization tools, and end-to-end ownership from invention to production deployment.
Responsibilities
- Develop incremental physical-design technology that can rapidly implement high-performance logic changes with DRC and parasitic awareness, including for both all-layer and metal-only ECOs.
- Invent improved detailed-routing algorithms for the intricate mix of discrete and continuous optimization problems arising from DRC constraints in the latest manufacturing processes.
- Help craft cross-domain optimization tools that simultaneously consider logic, timing, clocks, testability, power distribution, placement, along with routing and DRCs to push the frontier of computing performance.
- Own problems end-to-end—from algorithm invention through implementation, validation, and production deployment.
Qualifications
- MS, PhD, or equivalent experience, with 5+ years of relevant experience.
- Strong expertise in C++, high-performance software architecture and algorithm development, including complexity, data structures, and memory efficiency.
- Deep understanding of detailed routing, including advanced design rules, pin access, route optimization, and DRC-aware implementation.
- Understanding of areas often impacted and co-optimized with ECOs, including clock distribution, DFT, and power delivery.
- Authorization to work on export controlled data arising in CPUs, GPUs, LPUs, and communication networks.
Skills
Required:C++ programmingDetailed routingECO routingCross-domain optimization
Benefits
- Equity
- Benefits (per NVIDIA offerings)
Last updated Sep 4, 2026. Interested? Apply on the company site.
About NVIDIA
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