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Design Verification Engineer (RDSS Intern)

NVIDIA· Intern
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Taiwan, HsinchuinternPosted 1mo ago

About the role

RDSS Intern for the Multimedia IP team in Taiwan focused on design verification of latest multimedia IP in GPU and SoC chips, gaining hands-on experience across verification environments, plans, test cases, checkers, coverage, and regressions using SystemVerilog, UVM, and related methodologies.

Responsibilities

  • Collaborate closely with Architect, SOC, and IP teams to define the scope of verification.
  • Engage in meticulous test planning to ensure flawless execution.
  • Apply C/SV/UVM methodologies to verify builds at both block and full chip levels.
  • Contribute to the development of world-class verification strategies and processes.
  • Determine and solve complex verification challenges to compete in a fast-paced industry.
  • Work in a dynamic and inclusive environment, driving ambitious projects to successful implementation.

Qualifications

  • Master's Degree in Electrical Engineering (EE), Computer Science (CS), or Computer Engineering (CE) or equivalent work experience.
  • Proficiency in Object-Oriented Programming (OOP).
  • Proficiency with AI Agent and AI-enabled automation workflows.
  • Fundamental knowledge of digital build principles.
  • Strong analytical and problem-solving skills.
  • Ability to strictly adhere to verification protocols and methodologies.
  • Excellent communication and teamwork abilities.

Skills

Required:Object-Oriented Programming (OOP)SystemVerilogUVM
Nice to have:AI Agent / AI-enabled automationPython / scripting

Benefits

  • Highly competitive salaries
  • Comprehensive benefits package
  • Opportunity to work with industry-standard verification technologies (SystemVerilog, UVM, assertions, functional coverage)
Last updated Sep 4, 2026. Interested? Apply on the company site.

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