ATE Test Engineer
NVIDIA· Engineer, Test
Santa Clara, CA$132k - $207kfull-timePosted 1mo ago
About the role
Test Engineer position supporting the Integrated Circuit Defect Analysis (FA) team. Responsible for co-developing specialized test equipment, adapting FA methodologies, and crafting test scripts to enable diagnostics and root-cause isolation on advanced silicon using Advantest PS5000 and Teradyne UF+ platforms.
Responsibilities
- Port and develop test vectors, patterns, and software on the Advantest V93000 system, specifically the PS5000 module, as well as Teradyne UltraFLEXplus platforms.
- Convert design simulation data (e.g., VCD, EVCD, STIL) into functional, scan, and structural test patterns to recreate IC failures on the tester.
- Partner with FA engineers, design teams, and test floor technicians to translate physical FA steps like ATE-assisted EMMI or OBIRCH into reproducible, electrical test flows.
- Improve turnaround time from device failure to root cause by optimizing tester hardware bandwidth, signal integrity, and diagnostic software flows.
- Design, prototype, and validate custom test hardware (e.g., specialized load boards, probe cards, and DUT interfaces) for FA setups.
Qualifications
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related technical field, or equivalent experience.
- 5+ years of hands-on experience with Advantest V93000 (PS5000) (SmarTEST 8 environment) and Teradyne UltraFLEXplus (IG-XL software).
- Proficiency with script automation (Python, C++, or Perl) and digital vector processing/debug.
- Familiarity with IC FA flows, failure isolation, electrical fault localization, and yield analysis.
Skills
Required:Advantest V93000 PS5000Teradyne UltraFLEXplusScripting for test automation
Benefits
- equity
- comprehensive benefits package
Last updated Sep 4, 2026. Interested? Apply on the company site.
About NVIDIA
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